-- Copyright (C) 1991-2012 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- VENDOR "Altera"
-- PROGRAM "Quartus II 32-bit"
-- VERSION "Version 12.0 Build 178 05/31/2012 SJ Web Edition"

-- DATE "11/13/2012 16:49:35"

-- 
-- Device: Altera EP4CE22F17C6 Package FBGA256
-- 

-- 
-- This VHDL file should be used for ModelSim-Altera (VHDL) only
-- 

LIBRARY ALTERA;
LIBRARY CYCLONEIVE;
LIBRARY IEEE;
USE ALTERA.ALTERA_PRIMITIVES_COMPONENTS.ALL;
USE CYCLONEIVE.CYCLONEIVE_COMPONENTS.ALL;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY 	pruebas IS
    PORT (
	bus16 : OUT std_logic_vector(15 DOWNTO 0);
	clk : IN std_logic;
	ERA2 : IN std_logic;
	ERA1 : IN std_logic;
	ERA0 : IN std_logic;
	ERA12 : IN std_logic;
	ERA11 : IN std_logic;
	ERA10 : IN std_logic
	);
END pruebas;

-- Design Ports Information
-- bus16[15]	=>  Location: PIN_F14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[14]	=>  Location: PIN_T10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[13]	=>  Location: PIN_G2,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[12]	=>  Location: PIN_D9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[11]	=>  Location: PIN_R11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[10]	=>  Location: PIN_P11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[9]	=>  Location: PIN_E9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[8]	=>  Location: PIN_B16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[7]	=>  Location: PIN_C9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[6]	=>  Location: PIN_A10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[5]	=>  Location: PIN_F9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[4]	=>  Location: PIN_A15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[3]	=>  Location: PIN_P9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[2]	=>  Location: PIN_B10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[1]	=>  Location: PIN_T11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- bus16[0]	=>  Location: PIN_C11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- ERA12	=>  Location: PIN_A11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- ERA11	=>  Location: PIN_R12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- ERA10	=>  Location: PIN_F15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- clk	=>  Location: PIN_E1,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- ERA1	=>  Location: PIN_R10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- ERA0	=>  Location: PIN_N9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- ERA2	=>  Location: PIN_T12,	 I/O Standard: 2.5 V,	 Current Strength: Default


ARCHITECTURE structure OF pruebas IS
SIGNAL gnd : std_logic := '0';
SIGNAL vcc : std_logic := '1';
SIGNAL unknown : std_logic := 'X';
SIGNAL devoe : std_logic := '1';
SIGNAL devclrn : std_logic := '1';
SIGNAL devpor : std_logic := '1';
SIGNAL ww_devoe : std_logic;
SIGNAL ww_devclrn : std_logic;
SIGNAL ww_devpor : std_logic;
SIGNAL ww_bus16 : std_logic_vector(15 DOWNTO 0);
SIGNAL ww_clk : std_logic;
SIGNAL ww_ERA2 : std_logic;
SIGNAL ww_ERA1 : std_logic;
SIGNAL ww_ERA0 : std_logic;
SIGNAL ww_ERA12 : std_logic;
SIGNAL ww_ERA11 : std_logic;
SIGNAL ww_ERA10 : std_logic;
SIGNAL \clk~inputclkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \inst|Add1~10_combout\ : std_logic;
SIGNAL \inst|Add0~20_combout\ : std_logic;
SIGNAL \inst|x~1_combout\ : std_logic;
SIGNAL \inst|x~6_combout\ : std_logic;
SIGNAL \inst|busdatosbajaout[3]~feeder_combout\ : std_logic;
SIGNAL \bus16[15]~output_o\ : std_logic;
SIGNAL \bus16[14]~output_o\ : std_logic;
SIGNAL \bus16[13]~output_o\ : std_logic;
SIGNAL \bus16[12]~output_o\ : std_logic;
SIGNAL \bus16[11]~output_o\ : std_logic;
SIGNAL \bus16[10]~output_o\ : std_logic;
SIGNAL \bus16[9]~output_o\ : std_logic;
SIGNAL \bus16[8]~output_o\ : std_logic;
SIGNAL \bus16[7]~output_o\ : std_logic;
SIGNAL \bus16[6]~output_o\ : std_logic;
SIGNAL \bus16[5]~output_o\ : std_logic;
SIGNAL \bus16[4]~output_o\ : std_logic;
SIGNAL \bus16[3]~output_o\ : std_logic;
SIGNAL \bus16[2]~output_o\ : std_logic;
SIGNAL \bus16[1]~output_o\ : std_logic;
SIGNAL \bus16[0]~output_o\ : std_logic;
SIGNAL \clk~input_o\ : std_logic;
SIGNAL \clk~inputclkctrl_outclk\ : std_logic;
SIGNAL \ERA10~input_o\ : std_logic;
SIGNAL \ERA12~input_o\ : std_logic;
SIGNAL \inst|x[15]~feeder_combout\ : std_logic;
SIGNAL \inst|x~2_combout\ : std_logic;
SIGNAL \inst|x~4_combout\ : std_logic;
SIGNAL \ERA1~input_o\ : std_logic;
SIGNAL \ERA0~input_o\ : std_logic;
SIGNAL \ERA2~input_o\ : std_logic;
SIGNAL \inst|busdatosaltaout[7]~0_combout\ : std_logic;
SIGNAL \inst|Equal9~0_combout\ : std_logic;
SIGNAL \inst|Add1~1\ : std_logic;
SIGNAL \inst|Add1~2_combout\ : std_logic;
SIGNAL \inst|x~36_combout\ : std_logic;
SIGNAL \inst|Add0~0_combout\ : std_logic;
SIGNAL \inst|x~37_combout\ : std_logic;
SIGNAL \inst|Add1~0_combout\ : std_logic;
SIGNAL \inst|x~35_combout\ : std_logic;
SIGNAL \inst|x~38_combout\ : std_logic;
SIGNAL \inst|Add0~1\ : std_logic;
SIGNAL \inst|Add0~2_combout\ : std_logic;
SIGNAL \inst|busdatosbajaout[1]~feeder_combout\ : std_logic;
SIGNAL \inst|x~33_combout\ : std_logic;
SIGNAL \inst|x~34_combout\ : std_logic;
SIGNAL \inst|Add1~3\ : std_logic;
SIGNAL \inst|Add1~4_combout\ : std_logic;
SIGNAL \inst|Add0~3\ : std_logic;
SIGNAL \inst|Add0~4_combout\ : std_logic;
SIGNAL \inst|x~31_combout\ : std_logic;
SIGNAL \inst|x~32_combout\ : std_logic;
SIGNAL \inst|Add1~5\ : std_logic;
SIGNAL \inst|Add1~7\ : std_logic;
SIGNAL \inst|Add1~9\ : std_logic;
SIGNAL \inst|Add1~11\ : std_logic;
SIGNAL \inst|Add1~13\ : std_logic;
SIGNAL \inst|Add1~15\ : std_logic;
SIGNAL \inst|Add1~16_combout\ : std_logic;
SIGNAL \ERA11~input_o\ : std_logic;
SIGNAL \inst|x~20_combout\ : std_logic;
SIGNAL \inst|Add1~6_combout\ : std_logic;
SIGNAL \inst|Add0~5\ : std_logic;
SIGNAL \inst|Add0~6_combout\ : std_logic;
SIGNAL \inst|x~29_combout\ : std_logic;
SIGNAL \inst|x~30_combout\ : std_logic;
SIGNAL \inst|Add0~7\ : std_logic;
SIGNAL \inst|Add0~8_combout\ : std_logic;
SIGNAL \inst|Add1~8_combout\ : std_logic;
SIGNAL \inst|x~27_combout\ : std_logic;
SIGNAL \inst|x~28_combout\ : std_logic;
SIGNAL \inst|Add0~9\ : std_logic;
SIGNAL \inst|Add0~11\ : std_logic;
SIGNAL \inst|Add0~13\ : std_logic;
SIGNAL \inst|Add0~14_combout\ : std_logic;
SIGNAL \inst|x~21_combout\ : std_logic;
SIGNAL \inst|Add1~14_combout\ : std_logic;
SIGNAL \inst|x~22_combout\ : std_logic;
SIGNAL \inst|Add0~15\ : std_logic;
SIGNAL \inst|Add0~16_combout\ : std_logic;
SIGNAL \inst|x~18_combout\ : std_logic;
SIGNAL \inst|x~19_combout\ : std_logic;
SIGNAL \inst|Add0~17\ : std_logic;
SIGNAL \inst|Add0~18_combout\ : std_logic;
SIGNAL \inst|Add1~17\ : std_logic;
SIGNAL \inst|Add1~18_combout\ : std_logic;
SIGNAL \inst|x~16_combout\ : std_logic;
SIGNAL \inst|x~17_combout\ : std_logic;
SIGNAL \inst|Add1~19\ : std_logic;
SIGNAL \inst|Add1~20_combout\ : std_logic;
SIGNAL \inst|x~5_combout\ : std_logic;
SIGNAL \inst|x~14_combout\ : std_logic;
SIGNAL \inst|x~15_combout\ : std_logic;
SIGNAL \inst|Add1~21\ : std_logic;
SIGNAL \inst|Add1~22_combout\ : std_logic;
SIGNAL \inst|Add0~19\ : std_logic;
SIGNAL \inst|Add0~21\ : std_logic;
SIGNAL \inst|Add0~22_combout\ : std_logic;
SIGNAL \inst|x~12_combout\ : std_logic;
SIGNAL \inst|x~13_combout\ : std_logic;
SIGNAL \inst|Add1~23\ : std_logic;
SIGNAL \inst|Add1~25\ : std_logic;
SIGNAL \inst|Add1~27\ : std_logic;
SIGNAL \inst|Add1~28_combout\ : std_logic;
SIGNAL \inst|Add1~24_combout\ : std_logic;
SIGNAL \inst|Add0~23\ : std_logic;
SIGNAL \inst|Add0~24_combout\ : std_logic;
SIGNAL \inst|x~10_combout\ : std_logic;
SIGNAL \inst|x~11_combout\ : std_logic;
SIGNAL \inst|Add0~25\ : std_logic;
SIGNAL \inst|Add0~26_combout\ : std_logic;
SIGNAL \inst|Add1~26_combout\ : std_logic;
SIGNAL \inst|x~8_combout\ : std_logic;
SIGNAL \inst|x~9_combout\ : std_logic;
SIGNAL \inst|x[13]~feeder_combout\ : std_logic;
SIGNAL \inst|Add0~27\ : std_logic;
SIGNAL \inst|Add0~28_combout\ : std_logic;
SIGNAL \inst|x~7_combout\ : std_logic;
SIGNAL \inst|Add1~29\ : std_logic;
SIGNAL \inst|Add1~30_combout\ : std_logic;
SIGNAL \inst|Add0~29\ : std_logic;
SIGNAL \inst|Add0~30_combout\ : std_logic;
SIGNAL \inst|x~0_combout\ : std_logic;
SIGNAL \inst|x~3_combout\ : std_logic;
SIGNAL \inst|Bus16[15]~reg0feeder_combout\ : std_logic;
SIGNAL \inst|Bus16[15]~0_combout\ : std_logic;
SIGNAL \inst|Bus16[15]~reg0_q\ : std_logic;
SIGNAL \inst|Equal8~0_combout\ : std_logic;
SIGNAL \inst|Bus16[15]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[15]~en_q\ : std_logic;
SIGNAL \inst|Bus16[14]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[14]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[14]~en_q\ : std_logic;
SIGNAL \inst|Bus16[13]~reg0feeder_combout\ : std_logic;
SIGNAL \inst|Bus16[13]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[13]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[13]~en_q\ : std_logic;
SIGNAL \inst|Bus16[12]~reg0feeder_combout\ : std_logic;
SIGNAL \inst|Bus16[12]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[12]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[12]~en_q\ : std_logic;
SIGNAL \inst|Bus16[11]~reg0feeder_combout\ : std_logic;
SIGNAL \inst|Bus16[11]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[11]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[11]~en_q\ : std_logic;
SIGNAL \inst|Bus16[10]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[10]~en_q\ : std_logic;
SIGNAL \inst|Bus16[9]~reg0feeder_combout\ : std_logic;
SIGNAL \inst|Bus16[9]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[9]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[9]~en_q\ : std_logic;
SIGNAL \inst|Bus16[8]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[8]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[8]~en_q\ : std_logic;
SIGNAL \inst|Bus16[7]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[7]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[7]~en_q\ : std_logic;
SIGNAL \inst|Add0~12_combout\ : std_logic;
SIGNAL \inst|Add1~12_combout\ : std_logic;
SIGNAL \inst|x~23_combout\ : std_logic;
SIGNAL \inst|x~24_combout\ : std_logic;
SIGNAL \inst|Bus16[6]~reg0feeder_combout\ : std_logic;
SIGNAL \inst|Bus16[6]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[6]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[6]~en_q\ : std_logic;
SIGNAL \inst|Add0~10_combout\ : std_logic;
SIGNAL \inst|x~25_combout\ : std_logic;
SIGNAL \inst|x~26_combout\ : std_logic;
SIGNAL \inst|Bus16[5]~reg0feeder_combout\ : std_logic;
SIGNAL \inst|Bus16[5]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[5]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[5]~en_q\ : std_logic;
SIGNAL \inst|Bus16[4]~reg0feeder_combout\ : std_logic;
SIGNAL \inst|Bus16[4]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[4]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[4]~en_q\ : std_logic;
SIGNAL \inst|Bus16[3]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[3]~en_q\ : std_logic;
SIGNAL \inst|Bus16[2]~reg0feeder_combout\ : std_logic;
SIGNAL \inst|Bus16[2]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[2]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[2]~en_q\ : std_logic;
SIGNAL \inst|Bus16[1]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[1]~enfeeder_combout\ : std_logic;
SIGNAL \inst|Bus16[1]~en_q\ : std_logic;
SIGNAL \inst|Bus16[0]~reg0_q\ : std_logic;
SIGNAL \inst|Bus16[0]~en_q\ : std_logic;
SIGNAL \inst|x\ : std_logic_vector(15 DOWNTO 0);
SIGNAL \inst|busdatosbajaout\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \inst|busdatosaltaout\ : std_logic_vector(7 DOWNTO 0);

BEGIN

bus16 <= ww_bus16;
ww_clk <= clk;
ww_ERA2 <= ERA2;
ww_ERA1 <= ERA1;
ww_ERA0 <= ERA0;
ww_ERA12 <= ERA12;
ww_ERA11 <= ERA11;
ww_ERA10 <= ERA10;
ww_devoe <= devoe;
ww_devclrn <= devclrn;
ww_devpor <= devpor;

\clk~inputclkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \clk~input_o\);

-- Location: LCCOMB_X37_Y23_N10
\inst|Add1~10\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~10_combout\ = (\inst|x\(5) & (\inst|Add1~9\ & VCC)) # (!\inst|x\(5) & (!\inst|Add1~9\))
-- \inst|Add1~11\ = CARRY((!\inst|x\(5) & !\inst|Add1~9\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100000101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(5),
	datad => VCC,
	cin => \inst|Add1~9\,
	combout => \inst|Add1~10_combout\,
	cout => \inst|Add1~11\);

-- Location: LCCOMB_X36_Y23_N20
\inst|Add0~20\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~20_combout\ = (\inst|x\(10) & (\inst|Add0~19\ $ (GND))) # (!\inst|x\(10) & (!\inst|Add0~19\ & VCC))
-- \inst|Add0~21\ = CARRY((\inst|x\(10) & !\inst|Add0~19\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(10),
	datad => VCC,
	cin => \inst|Add0~19\,
	combout => \inst|Add0~20_combout\,
	cout => \inst|Add0~21\);

-- Location: FF_X36_Y23_N13
\inst|x[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~24_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(6));

-- Location: LCCOMB_X34_Y23_N22
\inst|x~1\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~1_combout\ = (\ERA11~input_o\ & ((\ERA10~input_o\ & (!\ERA12~input_o\ & \inst|x\(15))) # (!\ERA10~input_o\ & ((\inst|x\(15)) # (!\ERA12~input_o\))))) # (!\ERA11~input_o\ & (!\ERA10~input_o\ & (!\ERA12~input_o\ & \inst|x\(15))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0010101100000010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ERA11~input_o\,
	datab => \ERA10~input_o\,
	datac => \ERA12~input_o\,
	datad => \inst|x\(15),
	combout => \inst|x~1_combout\);

-- Location: FF_X35_Y23_N31
\inst|busdatosaltaout[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~7_combout\,
	sload => VCC,
	ena => \inst|busdatosaltaout[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosaltaout\(6));

-- Location: LCCOMB_X35_Y23_N30
\inst|x~6\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~6_combout\ = (\inst|x~5_combout\ & (((\inst|x\(14))) # (!\inst|x~4_combout\))) # (!\inst|x~5_combout\ & (\inst|x~4_combout\ & (\inst|busdatosaltaout\(6))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110101001100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~5_combout\,
	datab => \inst|x~4_combout\,
	datac => \inst|busdatosaltaout\(6),
	datad => \inst|x\(14),
	combout => \inst|x~6_combout\);

-- Location: FF_X39_Y23_N25
\inst|busdatosbajaout[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|busdatosbajaout[3]~feeder_combout\,
	ena => \inst|Equal9~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosbajaout\(3));

-- Location: LCCOMB_X39_Y23_N24
\inst|busdatosbajaout[3]~feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|busdatosbajaout[3]~feeder_combout\ = \inst|x~30_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|x~30_combout\,
	combout => \inst|busdatosbajaout[3]~feeder_combout\);

-- Location: IOOBUF_X53_Y24_N23
\bus16[15]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[15]~reg0_q\,
	oe => \inst|Bus16[15]~en_q\,
	devoe => ww_devoe,
	o => \bus16[15]~output_o\);

-- Location: IOOBUF_X34_Y0_N16
\bus16[14]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[14]~reg0_q\,
	oe => \inst|Bus16[14]~en_q\,
	devoe => ww_devoe,
	o => \bus16[14]~output_o\);

-- Location: IOOBUF_X0_Y23_N16
\bus16[13]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[13]~reg0_q\,
	oe => \inst|Bus16[13]~en_q\,
	devoe => ww_devoe,
	o => \bus16[13]~output_o\);

-- Location: IOOBUF_X31_Y34_N9
\bus16[12]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[12]~reg0_q\,
	oe => \inst|Bus16[12]~en_q\,
	devoe => ww_devoe,
	o => \bus16[12]~output_o\);

-- Location: IOOBUF_X34_Y0_N2
\bus16[11]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[11]~reg0_q\,
	oe => \inst|Bus16[11]~en_q\,
	devoe => ww_devoe,
	o => \bus16[11]~output_o\);

-- Location: IOOBUF_X38_Y0_N2
\bus16[10]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[10]~reg0_q\,
	oe => \inst|Bus16[10]~en_q\,
	devoe => ww_devoe,
	o => \bus16[10]~output_o\);

-- Location: IOOBUF_X29_Y34_N16
\bus16[9]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[9]~reg0_q\,
	oe => \inst|Bus16[9]~en_q\,
	devoe => ww_devoe,
	o => \bus16[9]~output_o\);

-- Location: IOOBUF_X53_Y22_N2
\bus16[8]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[8]~reg0_q\,
	oe => \inst|Bus16[8]~en_q\,
	devoe => ww_devoe,
	o => \bus16[8]~output_o\);

-- Location: IOOBUF_X31_Y34_N2
\bus16[7]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[7]~reg0_q\,
	oe => \inst|Bus16[7]~en_q\,
	devoe => ww_devoe,
	o => \bus16[7]~output_o\);

-- Location: IOOBUF_X34_Y34_N9
\bus16[6]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[6]~reg0_q\,
	oe => \inst|Bus16[6]~en_q\,
	devoe => ww_devoe,
	o => \bus16[6]~output_o\);

-- Location: IOOBUF_X34_Y34_N2
\bus16[5]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[5]~reg0_q\,
	oe => \inst|Bus16[5]~en_q\,
	devoe => ww_devoe,
	o => \bus16[5]~output_o\);

-- Location: IOOBUF_X38_Y34_N16
\bus16[4]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[4]~reg0_q\,
	oe => \inst|Bus16[4]~en_q\,
	devoe => ww_devoe,
	o => \bus16[4]~output_o\);

-- Location: IOOBUF_X38_Y0_N9
\bus16[3]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[3]~reg0_q\,
	oe => \inst|Bus16[3]~en_q\,
	devoe => ww_devoe,
	o => \bus16[3]~output_o\);

-- Location: IOOBUF_X34_Y34_N16
\bus16[2]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[2]~reg0_q\,
	oe => \inst|Bus16[2]~en_q\,
	devoe => ww_devoe,
	o => \bus16[2]~output_o\);

-- Location: IOOBUF_X36_Y0_N23
\bus16[1]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[1]~reg0_q\,
	oe => \inst|Bus16[1]~en_q\,
	devoe => ww_devoe,
	o => \bus16[1]~output_o\);

-- Location: IOOBUF_X38_Y34_N2
\bus16[0]~output\ : cycloneive_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \inst|Bus16[0]~reg0_q\,
	oe => \inst|Bus16[0]~en_q\,
	devoe => ww_devoe,
	o => \bus16[0]~output_o\);

-- Location: IOIBUF_X0_Y16_N8
\clk~input\ : cycloneive_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_clk,
	o => \clk~input_o\);

-- Location: CLKCTRL_G2
\clk~inputclkctrl\ : cycloneive_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "none")
-- pragma translate_on
PORT MAP (
	inclk => \clk~inputclkctrl_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \clk~inputclkctrl_outclk\);

-- Location: IOIBUF_X53_Y22_N8
\ERA10~input\ : cycloneive_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_ERA10,
	o => \ERA10~input_o\);

-- Location: IOIBUF_X40_Y34_N1
\ERA12~input\ : cycloneive_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_ERA12,
	o => \ERA12~input_o\);

-- Location: LCCOMB_X34_Y23_N24
\inst|x[15]~feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x[15]~feeder_combout\ = \inst|x~3_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \inst|x~3_combout\,
	combout => \inst|x[15]~feeder_combout\);

-- Location: FF_X34_Y23_N25
\inst|x[15]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x[15]~feeder_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(15));

-- Location: LCCOMB_X34_Y23_N4
\inst|x~2\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~2_combout\ = (\ERA11~input_o\ & (\inst|x\(15) & (\ERA10~input_o\ $ (\ERA12~input_o\)))) # (!\ERA11~input_o\ & ((\ERA10~input_o\) # ((\ERA12~input_o\) # (\inst|x\(15)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111110101010100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ERA11~input_o\,
	datab => \ERA10~input_o\,
	datac => \ERA12~input_o\,
	datad => \inst|x\(15),
	combout => \inst|x~2_combout\);

-- Location: LCCOMB_X34_Y23_N20
\inst|x~4\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~4_combout\ = (\ERA12~input_o\) # (\ERA11~input_o\ $ (!\ERA10~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100111111001",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ERA11~input_o\,
	datab => \ERA10~input_o\,
	datac => \ERA12~input_o\,
	combout => \inst|x~4_combout\);

-- Location: IOIBUF_X34_Y0_N22
\ERA1~input\ : cycloneive_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_ERA1,
	o => \ERA1~input_o\);

-- Location: IOIBUF_X29_Y0_N1
\ERA0~input\ : cycloneive_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_ERA0,
	o => \ERA0~input_o\);

-- Location: IOIBUF_X36_Y0_N8
\ERA2~input\ : cycloneive_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_ERA2,
	o => \ERA2~input_o\);

-- Location: LCCOMB_X35_Y23_N20
\inst|busdatosaltaout[7]~0\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|busdatosaltaout[7]~0_combout\ = (!\ERA1~input_o\ & (\ERA0~input_o\ & \ERA2~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \ERA1~input_o\,
	datac => \ERA0~input_o\,
	datad => \ERA2~input_o\,
	combout => \inst|busdatosaltaout[7]~0_combout\);

-- Location: FF_X35_Y23_N17
\inst|busdatosaltaout[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~13_combout\,
	ena => \inst|busdatosaltaout[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosaltaout\(3));

-- Location: FF_X34_Y23_N13
\inst|busdatosaltaout[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~17_combout\,
	ena => \inst|busdatosaltaout[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosaltaout\(1));

-- Location: LCCOMB_X35_Y23_N22
\inst|Equal9~0\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Equal9~0_combout\ = (\ERA1~input_o\ & (!\ERA0~input_o\ & \ERA2~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000110000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \ERA1~input_o\,
	datac => \ERA0~input_o\,
	datad => \ERA2~input_o\,
	combout => \inst|Equal9~0_combout\);

-- Location: FF_X38_Y23_N21
\inst|busdatosbajaout[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~32_combout\,
	ena => \inst|Equal9~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosbajaout\(2));

-- Location: LCCOMB_X37_Y23_N0
\inst|Add1~0\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~0_combout\ = \inst|x\(0) $ (VCC)
-- \inst|Add1~1\ = CARRY(\inst|x\(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101010110101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(0),
	datad => VCC,
	combout => \inst|Add1~0_combout\,
	cout => \inst|Add1~1\);

-- Location: LCCOMB_X37_Y23_N2
\inst|Add1~2\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~2_combout\ = (\inst|x\(1) & (\inst|Add1~1\ & VCC)) # (!\inst|x\(1) & (!\inst|Add1~1\))
-- \inst|Add1~3\ = CARRY((!\inst|x\(1) & !\inst|Add1~1\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100000011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(1),
	datad => VCC,
	cin => \inst|Add1~1\,
	combout => \inst|Add1~2_combout\,
	cout => \inst|Add1~3\);

-- Location: LCCOMB_X39_Y23_N18
\inst|x~36\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~36_combout\ = (\ERA11~input_o\ & (\ERA12~input_o\ & \inst|x\(0)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000000010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ERA11~input_o\,
	datab => \ERA12~input_o\,
	datac => \inst|x\(0),
	combout => \inst|x~36_combout\);

-- Location: FF_X39_Y23_N13
\inst|busdatosbajaout[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~38_combout\,
	sload => VCC,
	ena => \inst|Equal9~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosbajaout\(0));

-- Location: LCCOMB_X36_Y23_N0
\inst|Add0~0\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~0_combout\ = \inst|x\(0) $ (VCC)
-- \inst|Add0~1\ = CARRY(\inst|x\(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001111001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(0),
	datad => VCC,
	combout => \inst|Add0~0_combout\,
	cout => \inst|Add0~1\);

-- Location: LCCOMB_X39_Y23_N12
\inst|x~37\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~37_combout\ = (\ERA11~input_o\ & (!\ERA12~input_o\ & (\inst|busdatosbajaout\(0)))) # (!\ERA11~input_o\ & ((\ERA12~input_o\ & (\inst|busdatosbajaout\(0))) # (!\ERA12~input_o\ & ((\inst|Add0~0_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111000101100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ERA11~input_o\,
	datab => \ERA12~input_o\,
	datac => \inst|busdatosbajaout\(0),
	datad => \inst|Add0~0_combout\,
	combout => \inst|x~37_combout\);

-- Location: LCCOMB_X39_Y23_N16
\inst|x~35\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~35_combout\ = (\ERA11~input_o\ & (!\ERA12~input_o\ & ((\inst|Add1~0_combout\)))) # (!\ERA11~input_o\ & (((\inst|x\(0)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111001001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ERA11~input_o\,
	datab => \ERA12~input_o\,
	datac => \inst|x\(0),
	datad => \inst|Add1~0_combout\,
	combout => \inst|x~35_combout\);

-- Location: LCCOMB_X39_Y23_N4
\inst|x~38\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~38_combout\ = (\ERA10~input_o\ & ((\inst|x~36_combout\) # ((\inst|x~37_combout\)))) # (!\ERA10~input_o\ & (((\inst|x~35_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110110101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ERA10~input_o\,
	datab => \inst|x~36_combout\,
	datac => \inst|x~37_combout\,
	datad => \inst|x~35_combout\,
	combout => \inst|x~38_combout\);

-- Location: FF_X36_Y23_N1
\inst|x[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~38_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(0));

-- Location: LCCOMB_X36_Y23_N2
\inst|Add0~2\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~2_combout\ = (\inst|x\(1) & (!\inst|Add0~1\)) # (!\inst|x\(1) & ((\inst|Add0~1\) # (GND)))
-- \inst|Add0~3\ = CARRY((!\inst|Add0~1\) # (!\inst|x\(1)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(1),
	datad => VCC,
	cin => \inst|Add0~1\,
	combout => \inst|Add0~2_combout\,
	cout => \inst|Add0~3\);

-- Location: LCCOMB_X39_Y23_N28
\inst|busdatosbajaout[1]~feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|busdatosbajaout[1]~feeder_combout\ = \inst|x~34_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|x~34_combout\,
	combout => \inst|busdatosbajaout[1]~feeder_combout\);

-- Location: FF_X39_Y23_N29
\inst|busdatosbajaout[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|busdatosbajaout[1]~feeder_combout\,
	ena => \inst|Equal9~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosbajaout\(1));

-- Location: LCCOMB_X39_Y23_N6
\inst|x~33\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~33_combout\ = (\inst|x~20_combout\ & (\inst|x~4_combout\)) # (!\inst|x~20_combout\ & ((\inst|x~4_combout\ & ((\inst|busdatosbajaout\(1)))) # (!\inst|x~4_combout\ & (\inst|Add0~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~20_combout\,
	datab => \inst|x~4_combout\,
	datac => \inst|Add0~2_combout\,
	datad => \inst|busdatosbajaout\(1),
	combout => \inst|x~33_combout\);

-- Location: LCCOMB_X39_Y23_N10
\inst|x~34\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~34_combout\ = (\inst|x~20_combout\ & ((\inst|x~33_combout\ & (\inst|x\(1))) # (!\inst|x~33_combout\ & ((\inst|Add1~2_combout\))))) # (!\inst|x~20_combout\ & (((\inst|x~33_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~20_combout\,
	datab => \inst|x\(1),
	datac => \inst|Add1~2_combout\,
	datad => \inst|x~33_combout\,
	combout => \inst|x~34_combout\);

-- Location: FF_X36_Y23_N7
\inst|x[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~34_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(1));

-- Location: LCCOMB_X37_Y23_N4
\inst|Add1~4\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~4_combout\ = (\inst|x\(2) & ((GND) # (!\inst|Add1~3\))) # (!\inst|x\(2) & (\inst|Add1~3\ $ (GND)))
-- \inst|Add1~5\ = CARRY((\inst|x\(2)) # (!\inst|Add1~3\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110011001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(2),
	datad => VCC,
	cin => \inst|Add1~3\,
	combout => \inst|Add1~4_combout\,
	cout => \inst|Add1~5\);

-- Location: LCCOMB_X36_Y23_N4
\inst|Add0~4\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~4_combout\ = (\inst|x\(2) & (\inst|Add0~3\ $ (GND))) # (!\inst|x\(2) & (!\inst|Add0~3\ & VCC))
-- \inst|Add0~5\ = CARRY((\inst|x\(2) & !\inst|Add0~3\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(2),
	datad => VCC,
	cin => \inst|Add0~3\,
	combout => \inst|Add0~4_combout\,
	cout => \inst|Add0~5\);

-- Location: LCCOMB_X38_Y23_N2
\inst|x~31\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~31_combout\ = (\inst|x~20_combout\ & ((\inst|Add1~4_combout\) # ((\inst|x~4_combout\)))) # (!\inst|x~20_combout\ & (((\inst|Add0~4_combout\ & !\inst|x~4_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101011011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~20_combout\,
	datab => \inst|Add1~4_combout\,
	datac => \inst|Add0~4_combout\,
	datad => \inst|x~4_combout\,
	combout => \inst|x~31_combout\);

-- Location: LCCOMB_X38_Y23_N20
\inst|x~32\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~32_combout\ = (\inst|x~4_combout\ & ((\inst|x~31_combout\ & (\inst|x\(2))) # (!\inst|x~31_combout\ & ((\inst|busdatosbajaout\(2)))))) # (!\inst|x~4_combout\ & (((\inst|x~31_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~4_combout\,
	datab => \inst|x\(2),
	datac => \inst|busdatosbajaout\(2),
	datad => \inst|x~31_combout\,
	combout => \inst|x~32_combout\);

-- Location: FF_X36_Y23_N5
\inst|x[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~32_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(2));

-- Location: LCCOMB_X37_Y23_N6
\inst|Add1~6\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~6_combout\ = (\inst|x\(3) & (\inst|Add1~5\ & VCC)) # (!\inst|x\(3) & (!\inst|Add1~5\))
-- \inst|Add1~7\ = CARRY((!\inst|x\(3) & !\inst|Add1~5\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100000101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(3),
	datad => VCC,
	cin => \inst|Add1~5\,
	combout => \inst|Add1~6_combout\,
	cout => \inst|Add1~7\);

-- Location: LCCOMB_X37_Y23_N8
\inst|Add1~8\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~8_combout\ = (\inst|x\(4) & ((GND) # (!\inst|Add1~7\))) # (!\inst|x\(4) & (\inst|Add1~7\ $ (GND)))
-- \inst|Add1~9\ = CARRY((\inst|x\(4)) # (!\inst|Add1~7\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101010101111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(4),
	datad => VCC,
	cin => \inst|Add1~7\,
	combout => \inst|Add1~8_combout\,
	cout => \inst|Add1~9\);

-- Location: LCCOMB_X37_Y23_N12
\inst|Add1~12\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~12_combout\ = (\inst|x\(6) & ((GND) # (!\inst|Add1~11\))) # (!\inst|x\(6) & (\inst|Add1~11\ $ (GND)))
-- \inst|Add1~13\ = CARRY((\inst|x\(6)) # (!\inst|Add1~11\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101010101111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(6),
	datad => VCC,
	cin => \inst|Add1~11\,
	combout => \inst|Add1~12_combout\,
	cout => \inst|Add1~13\);

-- Location: LCCOMB_X37_Y23_N14
\inst|Add1~14\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~14_combout\ = (\inst|x\(7) & (\inst|Add1~13\ & VCC)) # (!\inst|x\(7) & (!\inst|Add1~13\))
-- \inst|Add1~15\ = CARRY((!\inst|x\(7) & !\inst|Add1~13\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100000101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(7),
	datad => VCC,
	cin => \inst|Add1~13\,
	combout => \inst|Add1~14_combout\,
	cout => \inst|Add1~15\);

-- Location: LCCOMB_X37_Y23_N16
\inst|Add1~16\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~16_combout\ = (\inst|x\(8) & ((GND) # (!\inst|Add1~15\))) # (!\inst|x\(8) & (\inst|Add1~15\ $ (GND)))
-- \inst|Add1~17\ = CARRY((\inst|x\(8)) # (!\inst|Add1~15\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101010101111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(8),
	datad => VCC,
	cin => \inst|Add1~15\,
	combout => \inst|Add1~16_combout\,
	cout => \inst|Add1~17\);

-- Location: FF_X35_Y23_N19
\inst|busdatosaltaout[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~19_combout\,
	sload => VCC,
	ena => \inst|busdatosaltaout[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosaltaout\(0));

-- Location: IOIBUF_X36_Y0_N15
\ERA11~input\ : cycloneive_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_ERA11,
	o => \ERA11~input_o\);

-- Location: LCCOMB_X39_Y23_N30
\inst|x~20\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~20_combout\ = ((\ERA12~input_o\ & \ERA11~input_o\)) # (!\ERA10~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100000011111111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \ERA12~input_o\,
	datac => \ERA11~input_o\,
	datad => \ERA10~input_o\,
	combout => \inst|x~20_combout\);

-- Location: FF_X38_Y23_N31
\inst|busdatosbajaout[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~22_combout\,
	sload => VCC,
	ena => \inst|Equal9~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosbajaout\(7));

-- Location: FF_X38_Y23_N5
\inst|busdatosbajaout[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~28_combout\,
	ena => \inst|Equal9~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosbajaout\(4));

-- Location: LCCOMB_X36_Y23_N6
\inst|Add0~6\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~6_combout\ = (\inst|x\(3) & (!\inst|Add0~5\)) # (!\inst|x\(3) & ((\inst|Add0~5\) # (GND)))
-- \inst|Add0~7\ = CARRY((!\inst|Add0~5\) # (!\inst|x\(3)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(3),
	datad => VCC,
	cin => \inst|Add0~5\,
	combout => \inst|Add0~6_combout\,
	cout => \inst|Add0~7\);

-- Location: LCCOMB_X39_Y23_N2
\inst|x~29\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~29_combout\ = (\inst|x~4_combout\ & ((\inst|busdatosbajaout\(3)) # ((\inst|x~20_combout\)))) # (!\inst|x~4_combout\ & (((!\inst|x~20_combout\ & \inst|Add0~6_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100101111001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|busdatosbajaout\(3),
	datab => \inst|x~4_combout\,
	datac => \inst|x~20_combout\,
	datad => \inst|Add0~6_combout\,
	combout => \inst|x~29_combout\);

-- Location: LCCOMB_X39_Y23_N20
\inst|x~30\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~30_combout\ = (\inst|x~20_combout\ & ((\inst|x~29_combout\ & (\inst|x\(3))) # (!\inst|x~29_combout\ & ((\inst|Add1~6_combout\))))) # (!\inst|x~20_combout\ & (((\inst|x~29_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~20_combout\,
	datab => \inst|x\(3),
	datac => \inst|Add1~6_combout\,
	datad => \inst|x~29_combout\,
	combout => \inst|x~30_combout\);

-- Location: FF_X36_Y23_N3
\inst|x[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~30_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(3));

-- Location: LCCOMB_X36_Y23_N8
\inst|Add0~8\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~8_combout\ = (\inst|x\(4) & (\inst|Add0~7\ $ (GND))) # (!\inst|x\(4) & (!\inst|Add0~7\ & VCC))
-- \inst|Add0~9\ = CARRY((\inst|x\(4) & !\inst|Add0~7\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(4),
	datad => VCC,
	cin => \inst|Add0~7\,
	combout => \inst|Add0~8_combout\,
	cout => \inst|Add0~9\);

-- Location: LCCOMB_X38_Y23_N10
\inst|x~27\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~27_combout\ = (\inst|x~20_combout\ & ((\inst|x~4_combout\) # ((\inst|Add1~8_combout\)))) # (!\inst|x~20_combout\ & (!\inst|x~4_combout\ & (\inst|Add0~8_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~20_combout\,
	datab => \inst|x~4_combout\,
	datac => \inst|Add0~8_combout\,
	datad => \inst|Add1~8_combout\,
	combout => \inst|x~27_combout\);

-- Location: LCCOMB_X38_Y23_N4
\inst|x~28\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~28_combout\ = (\inst|x~4_combout\ & ((\inst|x~27_combout\ & (\inst|x\(4))) # (!\inst|x~27_combout\ & ((\inst|busdatosbajaout\(4)))))) # (!\inst|x~4_combout\ & (((\inst|x~27_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(4),
	datab => \inst|x~4_combout\,
	datac => \inst|busdatosbajaout\(4),
	datad => \inst|x~27_combout\,
	combout => \inst|x~28_combout\);

-- Location: FF_X36_Y23_N9
\inst|x[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~28_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(4));

-- Location: LCCOMB_X36_Y23_N10
\inst|Add0~10\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~10_combout\ = (\inst|x\(5) & (!\inst|Add0~9\)) # (!\inst|x\(5) & ((\inst|Add0~9\) # (GND)))
-- \inst|Add0~11\ = CARRY((!\inst|Add0~9\) # (!\inst|x\(5)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(5),
	datad => VCC,
	cin => \inst|Add0~9\,
	combout => \inst|Add0~10_combout\,
	cout => \inst|Add0~11\);

-- Location: LCCOMB_X36_Y23_N12
\inst|Add0~12\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~12_combout\ = (\inst|x\(6) & (\inst|Add0~11\ $ (GND))) # (!\inst|x\(6) & (!\inst|Add0~11\ & VCC))
-- \inst|Add0~13\ = CARRY((\inst|x\(6) & !\inst|Add0~11\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(6),
	datad => VCC,
	cin => \inst|Add0~11\,
	combout => \inst|Add0~12_combout\,
	cout => \inst|Add0~13\);

-- Location: LCCOMB_X36_Y23_N14
\inst|Add0~14\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~14_combout\ = (\inst|x\(7) & (!\inst|Add0~13\)) # (!\inst|x\(7) & ((\inst|Add0~13\) # (GND)))
-- \inst|Add0~15\ = CARRY((!\inst|Add0~13\) # (!\inst|x\(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(7),
	datad => VCC,
	cin => \inst|Add0~13\,
	combout => \inst|Add0~14_combout\,
	cout => \inst|Add0~15\);

-- Location: LCCOMB_X38_Y23_N30
\inst|x~21\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~21_combout\ = (\inst|x~4_combout\ & ((\inst|x~20_combout\) # ((\inst|busdatosbajaout\(7))))) # (!\inst|x~4_combout\ & (!\inst|x~20_combout\ & ((\inst|Add0~14_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011100110101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~4_combout\,
	datab => \inst|x~20_combout\,
	datac => \inst|busdatosbajaout\(7),
	datad => \inst|Add0~14_combout\,
	combout => \inst|x~21_combout\);

-- Location: LCCOMB_X38_Y23_N22
\inst|x~22\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~22_combout\ = (\inst|x~20_combout\ & ((\inst|x~21_combout\ & (\inst|x\(7))) # (!\inst|x~21_combout\ & ((\inst|Add1~14_combout\))))) # (!\inst|x~20_combout\ & (((\inst|x~21_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101101011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~20_combout\,
	datab => \inst|x\(7),
	datac => \inst|x~21_combout\,
	datad => \inst|Add1~14_combout\,
	combout => \inst|x~22_combout\);

-- Location: FF_X36_Y23_N15
\inst|x[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~22_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(7));

-- Location: LCCOMB_X36_Y23_N16
\inst|Add0~16\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~16_combout\ = (\inst|x\(8) & (\inst|Add0~15\ $ (GND))) # (!\inst|x\(8) & (!\inst|Add0~15\ & VCC))
-- \inst|Add0~17\ = CARRY((\inst|x\(8) & !\inst|Add0~15\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(8),
	datad => VCC,
	cin => \inst|Add0~15\,
	combout => \inst|Add0~16_combout\,
	cout => \inst|Add0~17\);

-- Location: LCCOMB_X35_Y23_N18
\inst|x~18\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~18_combout\ = (\inst|x~5_combout\ & (\inst|x~4_combout\)) # (!\inst|x~5_combout\ & ((\inst|x~4_combout\ & (\inst|busdatosaltaout\(0))) # (!\inst|x~4_combout\ & ((\inst|Add0~16_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100111001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~5_combout\,
	datab => \inst|x~4_combout\,
	datac => \inst|busdatosaltaout\(0),
	datad => \inst|Add0~16_combout\,
	combout => \inst|x~18_combout\);

-- Location: LCCOMB_X35_Y23_N2
\inst|x~19\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~19_combout\ = (\inst|x~5_combout\ & ((\inst|x~18_combout\ & ((\inst|x\(8)))) # (!\inst|x~18_combout\ & (\inst|Add1~16_combout\)))) # (!\inst|x~5_combout\ & (((\inst|x~18_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~5_combout\,
	datab => \inst|Add1~16_combout\,
	datac => \inst|x\(8),
	datad => \inst|x~18_combout\,
	combout => \inst|x~19_combout\);

-- Location: FF_X36_Y23_N17
\inst|x[8]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~19_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(8));

-- Location: LCCOMB_X36_Y23_N18
\inst|Add0~18\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~18_combout\ = (\inst|x\(9) & (!\inst|Add0~17\)) # (!\inst|x\(9) & ((\inst|Add0~17\) # (GND)))
-- \inst|Add0~19\ = CARRY((!\inst|Add0~17\) # (!\inst|x\(9)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(9),
	datad => VCC,
	cin => \inst|Add0~17\,
	combout => \inst|Add0~18_combout\,
	cout => \inst|Add0~19\);

-- Location: LCCOMB_X37_Y23_N18
\inst|Add1~18\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~18_combout\ = (\inst|x\(9) & (\inst|Add1~17\ & VCC)) # (!\inst|x\(9) & (!\inst|Add1~17\))
-- \inst|Add1~19\ = CARRY((!\inst|x\(9) & !\inst|Add1~17\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100000011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(9),
	datad => VCC,
	cin => \inst|Add1~17\,
	combout => \inst|Add1~18_combout\,
	cout => \inst|Add1~19\);

-- Location: LCCOMB_X34_Y23_N6
\inst|x~16\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~16_combout\ = (\inst|x~5_combout\ & ((\inst|x~4_combout\) # ((\inst|Add1~18_combout\)))) # (!\inst|x~5_combout\ & (!\inst|x~4_combout\ & (\inst|Add0~18_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~5_combout\,
	datab => \inst|x~4_combout\,
	datac => \inst|Add0~18_combout\,
	datad => \inst|Add1~18_combout\,
	combout => \inst|x~16_combout\);

-- Location: LCCOMB_X34_Y23_N12
\inst|x~17\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~17_combout\ = (\inst|x~4_combout\ & ((\inst|x~16_combout\ & (\inst|x\(9))) # (!\inst|x~16_combout\ & ((\inst|busdatosaltaout\(1)))))) # (!\inst|x~4_combout\ & (((\inst|x~16_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(9),
	datab => \inst|x~4_combout\,
	datac => \inst|busdatosaltaout\(1),
	datad => \inst|x~16_combout\,
	combout => \inst|x~17_combout\);

-- Location: FF_X36_Y23_N19
\inst|x[9]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~17_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(9));

-- Location: LCCOMB_X37_Y23_N20
\inst|Add1~20\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~20_combout\ = (\inst|x\(10) & ((GND) # (!\inst|Add1~19\))) # (!\inst|x\(10) & (\inst|Add1~19\ $ (GND)))
-- \inst|Add1~21\ = CARRY((\inst|x\(10)) # (!\inst|Add1~19\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110011001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(10),
	datad => VCC,
	cin => \inst|Add1~19\,
	combout => \inst|Add1~20_combout\,
	cout => \inst|Add1~21\);

-- Location: FF_X35_Y23_N13
\inst|busdatosaltaout[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~15_combout\,
	sload => VCC,
	ena => \inst|busdatosaltaout[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosaltaout\(2));

-- Location: LCCOMB_X34_Y23_N26
\inst|x~5\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~5_combout\ = (\ERA11~input_o\) # ((!\ERA10~input_o\ & !\ERA12~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101110101011",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ERA11~input_o\,
	datab => \ERA10~input_o\,
	datac => \ERA12~input_o\,
	combout => \inst|x~5_combout\);

-- Location: LCCOMB_X35_Y23_N12
\inst|x~14\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~14_combout\ = (\inst|x~4_combout\ & (((\inst|busdatosaltaout\(2)) # (\inst|x~5_combout\)))) # (!\inst|x~4_combout\ & (\inst|Add0~20_combout\ & ((!\inst|x~5_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110011100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|Add0~20_combout\,
	datab => \inst|x~4_combout\,
	datac => \inst|busdatosaltaout\(2),
	datad => \inst|x~5_combout\,
	combout => \inst|x~14_combout\);

-- Location: LCCOMB_X35_Y23_N6
\inst|x~15\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~15_combout\ = (\inst|x~5_combout\ & ((\inst|x~14_combout\ & (\inst|x\(10))) # (!\inst|x~14_combout\ & ((\inst|Add1~20_combout\))))) # (!\inst|x~5_combout\ & (((\inst|x~14_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~5_combout\,
	datab => \inst|x\(10),
	datac => \inst|Add1~20_combout\,
	datad => \inst|x~14_combout\,
	combout => \inst|x~15_combout\);

-- Location: FF_X36_Y23_N21
\inst|x[10]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~15_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(10));

-- Location: LCCOMB_X37_Y23_N22
\inst|Add1~22\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~22_combout\ = (\inst|x\(11) & (\inst|Add1~21\ & VCC)) # (!\inst|x\(11) & (!\inst|Add1~21\))
-- \inst|Add1~23\ = CARRY((!\inst|x\(11) & !\inst|Add1~21\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100000011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(11),
	datad => VCC,
	cin => \inst|Add1~21\,
	combout => \inst|Add1~22_combout\,
	cout => \inst|Add1~23\);

-- Location: LCCOMB_X36_Y23_N22
\inst|Add0~22\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~22_combout\ = (\inst|x\(11) & (!\inst|Add0~21\)) # (!\inst|x\(11) & ((\inst|Add0~21\) # (GND)))
-- \inst|Add0~23\ = CARRY((!\inst|Add0~21\) # (!\inst|x\(11)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(11),
	datad => VCC,
	cin => \inst|Add0~21\,
	combout => \inst|Add0~22_combout\,
	cout => \inst|Add0~23\);

-- Location: LCCOMB_X35_Y23_N10
\inst|x~12\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~12_combout\ = (\inst|x~5_combout\ & ((\inst|x~4_combout\) # ((\inst|Add1~22_combout\)))) # (!\inst|x~5_combout\ & (!\inst|x~4_combout\ & ((\inst|Add0~22_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011100110101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~5_combout\,
	datab => \inst|x~4_combout\,
	datac => \inst|Add1~22_combout\,
	datad => \inst|Add0~22_combout\,
	combout => \inst|x~12_combout\);

-- Location: LCCOMB_X35_Y23_N16
\inst|x~13\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~13_combout\ = (\inst|x~4_combout\ & ((\inst|x~12_combout\ & (\inst|x\(11))) # (!\inst|x~12_combout\ & ((\inst|busdatosaltaout\(3)))))) # (!\inst|x~4_combout\ & (((\inst|x~12_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(11),
	datab => \inst|x~4_combout\,
	datac => \inst|busdatosaltaout\(3),
	datad => \inst|x~12_combout\,
	combout => \inst|x~13_combout\);

-- Location: FF_X36_Y23_N23
\inst|x[11]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~13_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(11));

-- Location: LCCOMB_X37_Y23_N24
\inst|Add1~24\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~24_combout\ = (\inst|x\(12) & ((GND) # (!\inst|Add1~23\))) # (!\inst|x\(12) & (\inst|Add1~23\ $ (GND)))
-- \inst|Add1~25\ = CARRY((\inst|x\(12)) # (!\inst|Add1~23\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101010101111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(12),
	datad => VCC,
	cin => \inst|Add1~23\,
	combout => \inst|Add1~24_combout\,
	cout => \inst|Add1~25\);

-- Location: LCCOMB_X37_Y23_N26
\inst|Add1~26\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~26_combout\ = (\inst|x\(13) & (\inst|Add1~25\ & VCC)) # (!\inst|x\(13) & (!\inst|Add1~25\))
-- \inst|Add1~27\ = CARRY((!\inst|x\(13) & !\inst|Add1~25\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100000101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(13),
	datad => VCC,
	cin => \inst|Add1~25\,
	combout => \inst|Add1~26_combout\,
	cout => \inst|Add1~27\);

-- Location: LCCOMB_X37_Y23_N28
\inst|Add1~28\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~28_combout\ = (\inst|x\(14) & ((GND) # (!\inst|Add1~27\))) # (!\inst|x\(14) & (\inst|Add1~27\ $ (GND)))
-- \inst|Add1~29\ = CARRY((\inst|x\(14)) # (!\inst|Add1~27\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110011001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(14),
	datad => VCC,
	cin => \inst|Add1~27\,
	combout => \inst|Add1~28_combout\,
	cout => \inst|Add1~29\);

-- Location: FF_X34_Y23_N9
\inst|busdatosaltaout[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~9_combout\,
	ena => \inst|busdatosaltaout[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosaltaout\(5));

-- Location: FF_X34_Y23_N29
\inst|busdatosaltaout[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~11_combout\,
	ena => \inst|busdatosaltaout[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosaltaout\(4));

-- Location: LCCOMB_X36_Y23_N24
\inst|Add0~24\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~24_combout\ = (\inst|x\(12) & (\inst|Add0~23\ $ (GND))) # (!\inst|x\(12) & (!\inst|Add0~23\ & VCC))
-- \inst|Add0~25\ = CARRY((\inst|x\(12) & !\inst|Add0~23\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(12),
	datad => VCC,
	cin => \inst|Add0~23\,
	combout => \inst|Add0~24_combout\,
	cout => \inst|Add0~25\);

-- Location: LCCOMB_X34_Y23_N2
\inst|x~10\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~10_combout\ = (\inst|x~5_combout\ & (((\inst|x~4_combout\)))) # (!\inst|x~5_combout\ & ((\inst|x~4_combout\ & (\inst|busdatosaltaout\(4))) # (!\inst|x~4_combout\ & ((\inst|Add0~24_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110010111100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~5_combout\,
	datab => \inst|busdatosaltaout\(4),
	datac => \inst|x~4_combout\,
	datad => \inst|Add0~24_combout\,
	combout => \inst|x~10_combout\);

-- Location: LCCOMB_X34_Y23_N28
\inst|x~11\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~11_combout\ = (\inst|x~5_combout\ & ((\inst|x~10_combout\ & (\inst|x\(12))) # (!\inst|x~10_combout\ & ((\inst|Add1~24_combout\))))) # (!\inst|x~5_combout\ & (((\inst|x~10_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(12),
	datab => \inst|x~5_combout\,
	datac => \inst|Add1~24_combout\,
	datad => \inst|x~10_combout\,
	combout => \inst|x~11_combout\);

-- Location: FF_X36_Y23_N25
\inst|x[12]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~11_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(12));

-- Location: LCCOMB_X36_Y23_N26
\inst|Add0~26\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~26_combout\ = (\inst|x\(13) & (!\inst|Add0~25\)) # (!\inst|x\(13) & ((\inst|Add0~25\) # (GND)))
-- \inst|Add0~27\ = CARRY((!\inst|Add0~25\) # (!\inst|x\(13)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(13),
	datad => VCC,
	cin => \inst|Add0~25\,
	combout => \inst|Add0~26_combout\,
	cout => \inst|Add0~27\);

-- Location: LCCOMB_X34_Y23_N10
\inst|x~8\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~8_combout\ = (\inst|x~5_combout\ & ((\inst|x~4_combout\) # ((\inst|Add1~26_combout\)))) # (!\inst|x~5_combout\ & (!\inst|x~4_combout\ & (\inst|Add0~26_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~5_combout\,
	datab => \inst|x~4_combout\,
	datac => \inst|Add0~26_combout\,
	datad => \inst|Add1~26_combout\,
	combout => \inst|x~8_combout\);

-- Location: LCCOMB_X34_Y23_N8
\inst|x~9\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~9_combout\ = (\inst|x~4_combout\ & ((\inst|x~8_combout\ & (\inst|x\(13))) # (!\inst|x~8_combout\ & ((\inst|busdatosaltaout\(5)))))) # (!\inst|x~4_combout\ & (((\inst|x~8_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(13),
	datab => \inst|x~4_combout\,
	datac => \inst|busdatosaltaout\(5),
	datad => \inst|x~8_combout\,
	combout => \inst|x~9_combout\);

-- Location: LCCOMB_X34_Y23_N30
\inst|x[13]~feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x[13]~feeder_combout\ = \inst|x~9_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \inst|x~9_combout\,
	combout => \inst|x[13]~feeder_combout\);

-- Location: FF_X34_Y23_N31
\inst|x[13]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x[13]~feeder_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(13));

-- Location: LCCOMB_X36_Y23_N28
\inst|Add0~28\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~28_combout\ = (\inst|x\(14) & (\inst|Add0~27\ $ (GND))) # (!\inst|x\(14) & (!\inst|Add0~27\ & VCC))
-- \inst|Add0~29\ = CARRY((\inst|x\(14) & !\inst|Add0~27\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \inst|x\(14),
	datad => VCC,
	cin => \inst|Add0~27\,
	combout => \inst|Add0~28_combout\,
	cout => \inst|Add0~29\);

-- Location: LCCOMB_X35_Y23_N26
\inst|x~7\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~7_combout\ = (\inst|x~6_combout\ & ((\inst|x~4_combout\) # ((\inst|Add1~28_combout\)))) # (!\inst|x~6_combout\ & (!\inst|x~4_combout\ & ((\inst|Add0~28_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011100110101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~6_combout\,
	datab => \inst|x~4_combout\,
	datac => \inst|Add1~28_combout\,
	datad => \inst|Add0~28_combout\,
	combout => \inst|x~7_combout\);

-- Location: FF_X36_Y23_N29
\inst|x[14]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~7_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(14));

-- Location: LCCOMB_X37_Y23_N30
\inst|Add1~30\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add1~30_combout\ = \inst|Add1~29\ $ (!\inst|x\(15))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datad => \inst|x\(15),
	cin => \inst|Add1~29\,
	combout => \inst|Add1~30_combout\);

-- Location: FF_X34_Y23_N17
\inst|busdatosaltaout[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~3_combout\,
	sload => VCC,
	ena => \inst|busdatosaltaout[7]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosaltaout\(7));

-- Location: LCCOMB_X36_Y23_N30
\inst|Add0~30\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Add0~30_combout\ = \inst|Add0~29\ $ (\inst|x\(15))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111111110000",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datad => \inst|x\(15),
	cin => \inst|Add0~29\,
	combout => \inst|Add0~30_combout\);

-- Location: LCCOMB_X34_Y23_N16
\inst|x~0\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~0_combout\ = (\ERA12~input_o\ & (\inst|busdatosaltaout\(7))) # (!\ERA12~input_o\ & ((\inst|Add0~30_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \ERA12~input_o\,
	datac => \inst|busdatosaltaout\(7),
	datad => \inst|Add0~30_combout\,
	combout => \inst|x~0_combout\);

-- Location: LCCOMB_X34_Y23_N14
\inst|x~3\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~3_combout\ = (\inst|x~1_combout\ & ((\inst|x~2_combout\) # ((\inst|Add1~30_combout\)))) # (!\inst|x~1_combout\ & (\inst|x~2_combout\ & ((\inst|x~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110110010101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~1_combout\,
	datab => \inst|x~2_combout\,
	datac => \inst|Add1~30_combout\,
	datad => \inst|x~0_combout\,
	combout => \inst|x~3_combout\);

-- Location: LCCOMB_X35_Y23_N0
\inst|Bus16[15]~reg0feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[15]~reg0feeder_combout\ = \inst|x~3_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|x~3_combout\,
	combout => \inst|Bus16[15]~reg0feeder_combout\);

-- Location: LCCOMB_X32_Y23_N26
\inst|Bus16[15]~0\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[15]~0_combout\ = (\ERA1~input_o\ & \ERA0~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010000010100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ERA1~input_o\,
	datac => \ERA0~input_o\,
	combout => \inst|Bus16[15]~0_combout\);

-- Location: FF_X35_Y23_N1
\inst|Bus16[15]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[15]~reg0feeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[15]~reg0_q\);

-- Location: LCCOMB_X35_Y23_N8
\inst|Equal8~0\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Equal8~0_combout\ = ((!\ERA2~input_o\) # (!\ERA0~input_o\)) # (!\ERA1~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011111111111111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \ERA1~input_o\,
	datac => \ERA0~input_o\,
	datad => \ERA2~input_o\,
	combout => \inst|Equal8~0_combout\);

-- Location: LCCOMB_X32_Y23_N16
\inst|Bus16[15]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[15]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[15]~enfeeder_combout\);

-- Location: FF_X32_Y23_N17
\inst|Bus16[15]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[15]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[15]~en_q\);

-- Location: FF_X35_Y23_N27
\inst|Bus16[14]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~7_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[14]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N18
\inst|Bus16[14]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[14]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[14]~enfeeder_combout\);

-- Location: FF_X32_Y23_N19
\inst|Bus16[14]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[14]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[14]~en_q\);

-- Location: LCCOMB_X35_Y23_N28
\inst|Bus16[13]~reg0feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[13]~reg0feeder_combout\ = \inst|x~9_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|x~9_combout\,
	combout => \inst|Bus16[13]~reg0feeder_combout\);

-- Location: FF_X35_Y23_N29
\inst|Bus16[13]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[13]~reg0feeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[13]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N4
\inst|Bus16[13]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[13]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[13]~enfeeder_combout\);

-- Location: FF_X32_Y23_N5
\inst|Bus16[13]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[13]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[13]~en_q\);

-- Location: LCCOMB_X35_Y23_N14
\inst|Bus16[12]~reg0feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[12]~reg0feeder_combout\ = \inst|x~11_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|x~11_combout\,
	combout => \inst|Bus16[12]~reg0feeder_combout\);

-- Location: FF_X35_Y23_N15
\inst|Bus16[12]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[12]~reg0feeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[12]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N30
\inst|Bus16[12]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[12]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[12]~enfeeder_combout\);

-- Location: FF_X32_Y23_N31
\inst|Bus16[12]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[12]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[12]~en_q\);

-- Location: LCCOMB_X35_Y23_N24
\inst|Bus16[11]~reg0feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[11]~reg0feeder_combout\ = \inst|x~13_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|x~13_combout\,
	combout => \inst|Bus16[11]~reg0feeder_combout\);

-- Location: FF_X35_Y23_N25
\inst|Bus16[11]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[11]~reg0feeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[11]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N28
\inst|Bus16[11]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[11]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[11]~enfeeder_combout\);

-- Location: FF_X32_Y23_N29
\inst|Bus16[11]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[11]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[11]~en_q\);

-- Location: FF_X35_Y23_N7
\inst|Bus16[10]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~15_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[10]~reg0_q\);

-- Location: FF_X38_Y23_N9
\inst|Bus16[10]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|Equal8~0_combout\,
	sload => VCC,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[10]~en_q\);

-- Location: LCCOMB_X35_Y23_N4
\inst|Bus16[9]~reg0feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[9]~reg0feeder_combout\ = \inst|x~17_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|x~17_combout\,
	combout => \inst|Bus16[9]~reg0feeder_combout\);

-- Location: FF_X35_Y23_N5
\inst|Bus16[9]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[9]~reg0feeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[9]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N22
\inst|Bus16[9]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[9]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[9]~enfeeder_combout\);

-- Location: FF_X32_Y23_N23
\inst|Bus16[9]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[9]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[9]~en_q\);

-- Location: FF_X35_Y23_N3
\inst|Bus16[8]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~19_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[8]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N24
\inst|Bus16[8]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[8]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[8]~enfeeder_combout\);

-- Location: FF_X32_Y23_N25
\inst|Bus16[8]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[8]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[8]~en_q\);

-- Location: FF_X38_Y23_N23
\inst|Bus16[7]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~22_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[7]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N6
\inst|Bus16[7]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[7]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[7]~enfeeder_combout\);

-- Location: FF_X32_Y23_N7
\inst|Bus16[7]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[7]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[7]~en_q\);

-- Location: FF_X38_Y23_N1
\inst|busdatosbajaout[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~24_combout\,
	ena => \inst|Equal9~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosbajaout\(6));

-- Location: LCCOMB_X38_Y23_N18
\inst|x~23\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~23_combout\ = (\inst|x~20_combout\ & ((\inst|x~4_combout\) # ((\inst|Add1~12_combout\)))) # (!\inst|x~20_combout\ & (!\inst|x~4_combout\ & (\inst|Add0~12_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~20_combout\,
	datab => \inst|x~4_combout\,
	datac => \inst|Add0~12_combout\,
	datad => \inst|Add1~12_combout\,
	combout => \inst|x~23_combout\);

-- Location: LCCOMB_X38_Y23_N0
\inst|x~24\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~24_combout\ = (\inst|x~4_combout\ & ((\inst|x~23_combout\ & (\inst|x\(6))) # (!\inst|x~23_combout\ & ((\inst|busdatosbajaout\(6)))))) # (!\inst|x~4_combout\ & (((\inst|x~23_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x\(6),
	datab => \inst|x~4_combout\,
	datac => \inst|busdatosbajaout\(6),
	datad => \inst|x~23_combout\,
	combout => \inst|x~24_combout\);

-- Location: LCCOMB_X38_Y23_N28
\inst|Bus16[6]~reg0feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[6]~reg0feeder_combout\ = \inst|x~24_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|x~24_combout\,
	combout => \inst|Bus16[6]~reg0feeder_combout\);

-- Location: FF_X38_Y23_N29
\inst|Bus16[6]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[6]~reg0feeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[6]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N20
\inst|Bus16[6]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[6]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[6]~enfeeder_combout\);

-- Location: FF_X32_Y23_N21
\inst|Bus16[6]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[6]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[6]~en_q\);

-- Location: FF_X36_Y23_N11
\inst|x[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|x~26_combout\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|x\(5));

-- Location: FF_X38_Y23_N25
\inst|busdatosbajaout[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~26_combout\,
	ena => \inst|Equal9~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|busdatosbajaout\(5));

-- Location: LCCOMB_X38_Y23_N6
\inst|x~25\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~25_combout\ = (\inst|x~4_combout\ & ((\inst|x~20_combout\) # ((\inst|busdatosbajaout\(5))))) # (!\inst|x~4_combout\ & (!\inst|x~20_combout\ & (\inst|Add0~10_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|x~4_combout\,
	datab => \inst|x~20_combout\,
	datac => \inst|Add0~10_combout\,
	datad => \inst|busdatosbajaout\(5),
	combout => \inst|x~25_combout\);

-- Location: LCCOMB_X38_Y23_N24
\inst|x~26\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|x~26_combout\ = (\inst|x~20_combout\ & ((\inst|x~25_combout\ & ((\inst|x\(5)))) # (!\inst|x~25_combout\ & (\inst|Add1~10_combout\)))) # (!\inst|x~20_combout\ & (((\inst|x~25_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \inst|Add1~10_combout\,
	datab => \inst|x~20_combout\,
	datac => \inst|x\(5),
	datad => \inst|x~25_combout\,
	combout => \inst|x~26_combout\);

-- Location: LCCOMB_X38_Y23_N14
\inst|Bus16[5]~reg0feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[5]~reg0feeder_combout\ = \inst|x~26_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \inst|x~26_combout\,
	combout => \inst|Bus16[5]~reg0feeder_combout\);

-- Location: FF_X38_Y23_N15
\inst|Bus16[5]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[5]~reg0feeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[5]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N2
\inst|Bus16[5]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[5]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[5]~enfeeder_combout\);

-- Location: FF_X32_Y23_N3
\inst|Bus16[5]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[5]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[5]~en_q\);

-- Location: LCCOMB_X38_Y23_N12
\inst|Bus16[4]~reg0feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[4]~reg0feeder_combout\ = \inst|x~28_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \inst|x~28_combout\,
	combout => \inst|Bus16[4]~reg0feeder_combout\);

-- Location: FF_X38_Y23_N13
\inst|Bus16[4]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[4]~reg0feeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[4]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N8
\inst|Bus16[4]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[4]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[4]~enfeeder_combout\);

-- Location: FF_X32_Y23_N9
\inst|Bus16[4]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[4]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[4]~en_q\);

-- Location: FF_X39_Y23_N21
\inst|Bus16[3]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~30_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[3]~reg0_q\);

-- Location: FF_X38_Y23_N27
\inst|Bus16[3]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \inst|Equal8~0_combout\,
	sload => VCC,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[3]~en_q\);

-- Location: LCCOMB_X38_Y23_N16
\inst|Bus16[2]~reg0feeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[2]~reg0feeder_combout\ = \inst|x~32_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|x~32_combout\,
	combout => \inst|Bus16[2]~reg0feeder_combout\);

-- Location: FF_X38_Y23_N17
\inst|Bus16[2]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[2]~reg0feeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[2]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N10
\inst|Bus16[2]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[2]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[2]~enfeeder_combout\);

-- Location: FF_X32_Y23_N11
\inst|Bus16[2]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[2]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[2]~en_q\);

-- Location: FF_X39_Y23_N11
\inst|Bus16[1]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~34_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[1]~reg0_q\);

-- Location: LCCOMB_X32_Y23_N0
\inst|Bus16[1]~enfeeder\ : cycloneive_lcell_comb
-- Equation(s):
-- \inst|Bus16[1]~enfeeder_combout\ = \inst|Equal8~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \inst|Equal8~0_combout\,
	combout => \inst|Bus16[1]~enfeeder_combout\);

-- Location: FF_X32_Y23_N1
\inst|Bus16[1]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Bus16[1]~enfeeder_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[1]~en_q\);

-- Location: FF_X39_Y23_N5
\inst|Bus16[0]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|x~38_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[0]~reg0_q\);

-- Location: FF_X35_Y23_N9
\inst|Bus16[0]~en\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \inst|Equal8~0_combout\,
	ena => \inst|Bus16[15]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \inst|Bus16[0]~en_q\);

ww_bus16(15) <= \bus16[15]~output_o\;

ww_bus16(14) <= \bus16[14]~output_o\;

ww_bus16(13) <= \bus16[13]~output_o\;

ww_bus16(12) <= \bus16[12]~output_o\;

ww_bus16(11) <= \bus16[11]~output_o\;

ww_bus16(10) <= \bus16[10]~output_o\;

ww_bus16(9) <= \bus16[9]~output_o\;

ww_bus16(8) <= \bus16[8]~output_o\;

ww_bus16(7) <= \bus16[7]~output_o\;

ww_bus16(6) <= \bus16[6]~output_o\;

ww_bus16(5) <= \bus16[5]~output_o\;

ww_bus16(4) <= \bus16[4]~output_o\;

ww_bus16(3) <= \bus16[3]~output_o\;

ww_bus16(2) <= \bus16[2]~output_o\;

ww_bus16(1) <= \bus16[1]~output_o\;

ww_bus16(0) <= \bus16[0]~output_o\;
END structure;


